Accelerating Chipmaking Innovation for the Energy-Efficient AI Era

At pivotal moments in history, progress has required more than individual brilliance. The most consequential breakthroughs, such as those achieved under the Human Genome Project, have necessitated a new operating paradigm: concentrate the world's best talent around a single mission, establish a common platform, share critical infrastructure, and collapse feedback loops. Today, the AI era is creating an engineering race with similar demands.

Every company is pushing to deliver higher-performance AI systems, faster. But performance is no longer defined by compute alone. AI workloads are increasingly dominated by the movement of data: in many cases, moving bits consumes as much—or more—energy than compute itself.

As a result, reducing energy per bit can extend system-level performance alongside gains in peak compute. The path to energy-efficient AI, therefore, runs through system-level engineering, spanning three tightly interconnected domains: Logic, Memory, and Advanced Packaging. These domains can no longer be optimized independently.

Gains in logic efficiency stall without sufficient memory bandwidth. Advances in memory bandwidth fall short if packaging cannot deliver proximity within thermal and mechanical constraints. The traditional R&D workflow in the semiconductor industry has been too slow for the angstrom-era AI.

For decades, the industry's R&D model has resembled a relay race, with capabilities developed in one part of the ecosystem, handed off downstream through integration and manufacturing, evaluated by chip and system designers, and only then fed back for the next iteration. However, the AI timeline has upended these rules. At angstrom-scale dimensions, the physics enforces inescapable coupling across the entire stack.

Applied Materials, together with its customers, is charting a course across the next 3–4 generations, extending as far as 10 years down the roadmap. The company has launched the EPIC Center, representing a roughly $5 billion investment, which is the largest commitment to advanced semiconductor equipment R&D in U.S. history.

EPIC is designed to solve the challenge of accelerating chipmaking innovation through a new operating system for high-velocity co-innovation. EPIC is not just a state-of-the-art facility but a platform that revolutionizes how ideas move from the lab to the fab. The model compresses the traditional workflow by having customer engineers work side-by-side with Applied technologists from day one.